1. Technical Field
Various embodiments relate to a semiconductor apparatus, and more particularly, to a semiconductor apparatus that is stacked through a Through-Via.
2. Related Art
Recent technological advances directed towards attempts to increase the integrity of semiconductor apparatuses have led to the development of a 3 dimensional (3D) semiconductor apparatus where a plurality of chips are stacked and packaged in single package. The 3D semiconductor apparatus seeks to increase integrity in a relatively limited amount of space by vertically stacking two or more chips.
In one example of a 3D semiconductor apparatus, a plurality of substantially similar or different chips are stacked. The plurality of stacked chips are electrically coupled to each other through wires like metal lines.
In some cases, “Through Silicon Via” (TSV) is used to electrically couple the plurality of stacked chips. The TSV extends through the plurality of stacked chips. A semiconductor apparatus that uses a TSV structure that vertically extends through and electrically couples the plurality of chips typically has a relatively smaller size package than a semiconductor apparatus that uses a wire structure to electrically couple the plurality of chips through edge-wiring.
A Through Via such as the TSV is typically created by forming a hole that extends through the chip, forming a dielectric layer on the side wall of the hole, and filling a conducting material in the dielectric layer. The Through-Via is used as a pathway for transferring a signal and electrically couples the stacked chips.